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AS1121
Datasheet - D e t a i l e d D e s c r i p t i o n
Table 6. XERR Truth Table
Error Condition
Error Information
Selected Mode
Status
Temp.
OUT n Voltage
Thermal
Error Flag
Thermal
Warning
Flag
Open LED
Detect
OEN
Mode
XERR
O
p
e
n
T
e
m
p
T J < T TEF
T J > T TEF
T J > T TEF
T J < T TEF
T J > T TWF
T J < T TWF
OUT n > V LOD
OUT n < V LOD
OUT n > V LOD
OUT n < V LOD
Don't Care
Don't Care
Don't Care
Don't Care
0
0
1
1
0
1
Don't Care
Don't Care
Don't Care
Don't Care
Don't Care
Don't Care
Don't Care
Don't Care
0
1
0
1
0
1
Don't Care
Don't Care
Don't Care
Don't Care
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
1
0
0
0
1
0
1
0
normal
open error
temp. error
open & temp.
error
normal
temp error
normal
temp. warn
Overtemperature Error/Warning Flags
The AS1121 provides a overtemperature circuit to indicate that the device is in an overtemperature condition. If the device junction temperature
(T J ) exceeds the threshold temperature (150°C typ), the overtemperature circuit trips and pulls XERR to ground. The overtemperature flag sta-
tus can be read out from the AS1121 status register.
To prevent an overtemperature condition the AS1121 offers an temperature warning flag at 125°C typical. This flag can be used to take precau-
tions (e.g. start an external cooling) against a overtemperature condition.
Open LED Detection
The AS1121 integrated open LED detection circuit reports an error if any of the 16 LEDs is open or disconnected from the circuit. The open LED
detection circuit trips when the error detection is activated and the voltage at OUT n is less than V LOD .
Note: The voltage at each OUT n is sampled 1 μs after being switched on. Please refer to Figure 18 on page 11 .
The open LED detection circuit also pulls XERR to GND when tripped. The open LED status of each channel can also be read out from the
AS1121 status information data (SID) during a greyscale data input cycle.
Figure 18. Error Detection Timing (GS=FFFF HEX , DC=3F HEX )
LD
t ERR
OEN
GSCLK
SID
Error
Detection
Start
LOD n
LOD n+1
Error
Detection
End
Note: The rising edge of LD latches new data into the internal registers depending on the logic level of the pin MODE. If the pin MODE is tied
GND, the greyscale registers are updated. If the pin MODE is tied to V CC , the dot correction registers are updated.
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